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VXI SLOT-0 CONTROLLER VXI-VXB INTE086

Description

VXI-VXB is a high-speed VXI interface that is intended to connect PCI bus-equipped computer and VXIbus (VME eXtension for Instrumentation) rev. 1.4 measurement systems' mainframes. PCI and VXI buses are connected by VXB bus that is mostly nonmultiplexed VME bus on the cable providing transfer of trapezoid signals with 120 Ohm wave resistance open-collector for VXI bus support.
Set of VXB system modules implements PCI-VXI bridge function and performs function of VXI bus slot-0 system controller. VXB interface system consists of PCI-VXB board installable to the personal computer, VXI-VXB module installable to the VXI mainframe's slot-0 and VXB bus cable system (1VXB cable, 2VXB cable, terminator unit). PCI-VXB board implements functions of PCI-VXB bridge and VXB bus system controller. VXI-VXB module performs functions of VXI-VXB bridge and VXI bus system controller. 1VXB cable connects PCI-VXB board to the VXI-VXB module and to the 2VXB cable or to the VXB bus lines terminator. 1VXB cable can has 2 m. and 4 m. length implementations (8 m. in future). 2VXB cable connects 1VXB cable to the VXI-VXB module and to the same 2VXB cable or to the VXB bus lines terminator to increase number of VXI mainframes connected to the VXB bus. 2VXB can has 1, 2 or 4 m. length implementations (8 m. in future).
VXB terminator unit implements physical termination of VXB bus and electrical conditioning of VXB bus lines. Terminator is installed on the last point of VXB bus level branch. PCI-VXB board (VXB bus controller) implements first point of VXB bus level branch. This board is installed to any free PCI slot of control PC. VXI-VXB module (VXB bus slot-0 modules) are the servants of VXB bus. They are installed to the VXI mainframe's slot-0.
VXB interface operates under management of VISA library that conforms all VXIplug&play specs.

Specifications

- Full implementation of PCI-VXI bridge function.
- 32/64-bit, 33 MHz PCI bus interface.
- Full implementation of VXIbus interface system controller function.
- Internal FIFO for data exchange between PCI-bus interface andVXI-bus interface (FIFO 256 byte).
- Programmable DMA controllers for communications between PCI and VXI buses.
- VXI bus supported address and data spaces:
- A32/A24/A16 master и slave
- D32/D16/D08 master и slave
- BLT, ADOH, RMW.
- Four (4) independent programmable windows for back-to-back referencing between PCI and VXI buses (one of them permanently resides on A16 with Data Supervisor privilege for fastest access to A16/D16 devices).
- Automatic initializing by PC power-on (plug&play mode).
- Combining of several (up to 8) VXI mainframes to the single system.
- External TTLIN and TTLOUT connectors mapped to any VXI TTLTRG line.
- Many mainframes from one 10 MHz clock frequency operation (external clock frequency, input or output).
- Full implementation of VXI slot-0 function with dynamic configuration of installed VXI modules.
- 16 MHz system clock driver.
- System monitor and bus timer (VXIbus timeout (BTO) service on VXI bus) function implementation.
- Programmable VXIbus timeout from 16 mks to 1024 mks or "prohibited".
- VXI bus arbiter function implementation (PRI arbiter).
- Programmable time VXIbus Arbitration timeout from 16 mks to 256 mks or "prohibited".
- VXI bus interrupts handler function implementation.
- Implementation of PCI Master Interface function with generation of following commands types: I/O Read, I/O Write, Memory Read, Memory Read Multiple, Memory Write, Configuration Read (Type 0,1), Configuration Write (Type 0,1).
- Exchange with PCI bus in "burst" mode can be programmed for 32, 64 and 128 bytes.
- Implementation of PCI Target Interface function that uses following commands: I/O Read, I/O Write, Memory Read, Memory Write, Configuration Read (Type 0), Memory Read Multiple (aliased to Memory Read).
- VXI bus functions implementation: VXI Master, VXI Slave, VXI Commander, VXI Servant.
- Maximum available data exchange rates:

PCI Slave Channel Performance
Coupled Read PCI target response 8 PCI clocks
Coupled Write PCI target response 9 PCI clocks
Decoupled Write
- non-block D32 VXI cycle time 180 ns
sustained perf (32-byte PABS) 23 MB/s
sustained perf (64-byte PABS) 43 MB/s
- D32 BLT VXI cycle time 119 ns
sustained perf (32-byte PABS) 32 MB/s
sustained perf (64-byte PABS) 35 MB/s

VXI Slave Channel Performance (VME Slave Response)
Coupled Read non-block 301 ns
D32 BLT 293 ns
Coupled Write non-block 278 ns
D32 BLT 264 ns
Pre-fetched Read
VXI slave response (1st data beat) 293 ns
VXI slave response (other data beats) 57 ns
Decoupled Write
non-block slave response 127 ns
block slave response (1st data beat) 127 ns
block slave response (other data beats) 50 ns

DMA Channel Performance
CI Reads 32-byte PABS 97 (194)* MB/s
64-byte PABS 118 (236) MB/s
PCI Writes 32-byte PABS 98 (196) MB/s
64-byte PABS 125 (250) MB/s
VXI Reads non-block D32 18 MB/s
D32 BLT 22 MB/s
VXI Writes non-block D32 22 MB/s
D32 BLT 32 MB/s

* - in brackets - specs for 64-bit PCI
- Operates under the control of VISA library.
- Cable length:
- 1VXB - 2 m, 4 m (options)
- 2VXB - 1 m, 2 m, 4 m (options).
- Supply voltages:
- PCI-VXB module: +5 V, 2 A
- VXI-VXB module: +5 V, 3.5 A, -2 V, 100 mA, -5.2 V, 200 mA.
- VXI-VXB module's dimensions: С-1.
- PCI-VXB board weight: not more 0.5 kg.
- VXI-VXB module weight: not more 2 kg.
- Operation conditions:
- Ambient temperature: +5C - +40C
- Relative humidity 80% at +25C ambient temperature
- Storage conditions:
- ambient temperature: -40C - +85C.

Testing

VXB interface throughput was compared with throughput of most similar by structure, widely spread and most speed of existing VXI interfaces - MXI2 interface made by National Instruments company. Investigations show that nonmultiplexed structure of VXB allows much more high exchange rates and significantly shorter delays between input/output operations. Also more quick response to VXI hardware interrupts was noted. It is explaned by full hardware implementation of that process in VXB compared to software implementation in MXI2.
VXB and MXI2 interfaces rate was estimated by VXI register module supporting A16/A24 address spaces and D16 word format. VISA librarys designed specially for particular interface (NI-VXI/VISA3.2 for MXI2) were used for tests. VXB exceeds MXI2 almost five times in short data blocks operations due to large difference in delay between blocks. Correlation of VXI-MXI2 and VXI-VXB productivity in other modes is shown in the following table.
Mode MXI2 VXB
Single reading (A16/D16, 24/D16)
136K words/s 487K words/s (>3.6 times)
Single writing (A16/D16, 24/D16)
143K words/s 593K words/s (>4.15 times)
Block reading, block length 4K words (A16/D16)
706K words/s 819K words/s (>1.15 times)
Block writing, block length 4K words (A16/D16)
817K words/s 1117K words/s (>1.35 times)
Block reading, block length 4K words (A24/D16 with address increment, with BLT) 2613K words/s 2128K words/s (<1.2 times)
Block reading, block length 4K words (A24/D16 with address increment, w/o BLT) 1996K words/s 1553K words/s (<1.30 times)
Block writing, block length 2K words (A24/D16 with address increment, with BLT) 1087K words/s 2144K words/s (>2.0 times)
Block writing, block length 2K words (A24/D16 with address increment, w/o BLT) 1086K words/s 1562K words/s (>1.4 times)
Delays between blocks (viMoveIn / viMoveOut)
220 mks about 2 mks

Since single operations take from 60% to 80% of total exchange via interface in real VXI systems that exactly they define interface's productivity. On average VXB exceeds MXI2 4 times in single input/output operations and 10% in block operations. So VXB interface was found to be much faster in VXI devices control operations and in responce to such devices events and provided not less productivity during large data arrays exchange. And in comparison to popular VXI-1394 serial interface and GPIB-VXI interface VXB exceeds them hundreds times. Based on VXI-VXB PCI-VXI interface kit is designed for common-industrial usage in different test-measuring VXI systems with 10 years life-time.
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